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IRS2092(S) Functional Description
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The IRS2092(S) is a Class D audio amplifier driver with integrated PWM modulator and over current protection. Combined with two external MOSFETs and a few external components, the IRS2092(S) forms a complete Class D amplifier with dual over current, and shoot-through protection, as well as UVLO protection for the three bias supplies. The versatile structure of the analog input section with an error amplifier and a PWM comparator has the flexibility of implementing different types of PWM modulator schemes. Loss-less current sensing utilizes RDS(on) of the MOSFETs. The protection control logic monitors the status of the power supplies and load current across each MOSFET. For the convenience of half bridge configuration, the analog PWM modulator and. | International IGR Rectifier APPLICATION NOTE Application Note AN-1138 IRS2092 S Functional Description By Jun Honda Xiao-chang Cheng Wenduo Liu Table of Contents Page General Description.1 Typical Implementation.1 PWM Modulator.3 MOSFET Selection.6 Protection Design.7 Deadtime Generator.12 Power Supply.14 Junction Temperature Estimation.15 Board Layout Considerations.15 www.irf.com AN-1138 International IGR Rectifier IRS2092 S General Description The IRS2092 S is a Class D audio amplifier driver with integrated PWM modulator and over current protection. Combined with two external MOSFETs and a few external components the IRS2092 S forms a complete Class D amplifier with dual over current and shoot-through protection as well as UVLO protection for the three bias supplies. The versatile structure of the analog input section with an error amplifier and a PWM comparator has the flexibility of implementing different types of PWM modulator schemes. Loss-less current sensing utilizes RDS On of the MOSFETs. The protection control logic monitors the status of the power supplies and load current across each MOSFET. For the convenience of half bridge configuration the analog PWM modulator and protection logic are constructed on a floating well. The IRS2092 S implements start-up click noise elimination to suppress unwanted audible noise during PWM start-up and shut-down. Typical Implementation The following explanations are based on a typical application circuit with self-oscillating PWM topology shown in Figure 1. For further information refer to the IRAUDAMP5 reference design. APPLICATION NOTE Input Section The audio input stage of IRS2092 S is configured as an inverting error amplifier. In Figure 2 the voltage gain of the amplifier GV is determined by input resistor RIN and feedback resistor RFB. Gv Rfb Rin Since the feedback resistor RFB is part of an integrator time constant which determines switching frequency changing overall voltage gain by RIN is simpler and therefore