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Handbook of algorithms for physical design automation part 69

Handbook of Algorithms for Physical Design Automation part 69 provides a detailed overview of VLSI physical design automation, emphasizing state-of-the-art techniques, trends and improvements that have emerged during the previous decade. After a brief introduction to the modern physical design problem, basic algorithmic techniques, and partitioning, the book discusses significant advances in floorplanning representations and describes recent formulations of the floorplanning problem. The text also addresses issues of placement, net layout and optimization, routing multiple signal nets, manufacturability, physical synthesis, special nets, and designing for specialized technologies. It includes a personal perspective from Ralph Otten as he looks back on. | 662 Handbook of Algorithms for Physical Design Automation worst case when the victim net is fully coupled from both sides by two aggressor nets. Of course more optimistic modeling for example based on some distribution assumption is also applicable. Nevertheless it will be clear that the technical conclusion say with the distribution assumption remains similar and thus we should focus on the worst-case scenario for easier presentation. With the worst-case scenario we have 2 vcf Cc d dmin Furthermore 2cc is adopted in the model to account for the worst case coupling effect when all the aggressor nets have different signal transitions from that of the victim net for which the Miller effect makes the coupling phenomenon more significant by doubling the coupling effect. Again the technique to be presented readily applies to other models with less pessimistic estimation. Consider a wire e u v where u and v are two nodes in a buffered tree. Let the length of the wire segment e be le and T v be the subtree rooted at v. IT v is the total downstream current seen at v and is the current induced by aggressor nets on downstream wires of v. The current on a unit-length wire induced by aggressor nets is i0 kpc 24 where c is the unit-length wire capacitance k is the fixed ratio of coupling to total wire capacitance p is the slope i.e. power supply voltage over input rise time of all aggressor nets signals and cc is modeled as some fraction of the unit-length wire capacitance of the victim net. Let x u v be the noise on the wire segment between two neighboring buffers u and v. The resulting noise x u v induced from the coupling current is the voltage pulse coupled from aggressor nets in the victim net for a wire segment e u v . Using an Elmore-delay like noise metric 24 to model x u v see Chapter 3 we can express the noise constraint as Z . iole . X . v Rb r v rle ------- v I Mv 33.1 where Rb is the output resistance of a minimum size buffer and Mv is the noise margin for a buffer