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Microengineering MEMs and Interfacing - Danny Banks Part 4

Tham khảo tài liệu 'microengineering mems and interfacing - danny banks part 4', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | 40 Microengineering MEMS and Interfacing A Practical Guide FIGURE 2.4 Silicon bar. Image courtesy of Compart Technology Ltd Peterborough U.K. www.compart-tech.co.uk and Forest Software Peterborough U.K. www.forestsoft-ware.co.uk. in a rotating clamp is brought up to the surface of the melt. As the seed crystal is slowly withdrawn from the crucible it draws out the cooling silicon with it. As this solidifies it takes on the same crystal structure as that of the seed crystal. The result is a cylindrical bar or ingot Figure 2.4 of up to 12-in. 300-mm diameter. Note wafer diameters are often specified in imperial units . 2.4 DOPING Impurities are normally introduced into the silicon melt to dope it as either a p-type or n-type semiconductor. In the case of p-type semiconductors a group III element boron B is introduced. Group V elements phosphorous P or arsenic As are used to form n-type silicon. The introduction of a small proportion of B impurities into the silicon reduces the number of electrons available from carrying current whereas n-type dopants such as P or As increase the number of available electrons. The physical effects induced by this processing form the basis of electronic components such as diodes and transistors. Dopant Levels Silicon is referred to as p-type p or p also n-type n or n silicon depending on the degree of doping. Silicon wafers will be either n- or p-type. Electronic devices will usually be constructed of n-type and p-type layers with more heavily doped n or p regions being used to connect to conductive interconnects. Heavily doped n and p silicon is highly conductive and not normally used in devices except as short-conducting tracks. Copyright 2006 Taylor Francis Group LLC Silicon Micromachining 41 In the fabrication of both electronic circuits and MEMS it is desirable to introduce controlled levels of impurities into the silicon substrate in specific areas. The engineer has two basic options for achieving this thermal diffusion and ion .