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CS6290 Caches

CS6290 Caches presents Locality and Caches, Storage Hierarchy and Locality, Memory Latency is Long, Cache Basics, Cache Placement, Cache Identification, Cache Replacement, Implementing LRU, Approximating LRU. | CS6290 Caches Locality and Caches • Data Locality – Temporal: if data item needed now, it is likely to be needed again in near future – Spatial: if data item needed now, nearby data likely to be needed in near future • Exploiting Locality: Caches – Keep recently used data in fast memory close to the processor – Also bring nearby data there Storage Hierarchy and Locality Capacity + Speed - Disk SRAM Cache Main Memory Row buffer L3 Cache L2 Cache ITLB Instruction Cache Data Cache DTLB Register File Bypass Network Speed + Capacity - Memory Latency is Long • 60-100ns not totally uncommon • Quick back-of-the-envelope calculation: – 2GHz CPU – 0.5ns / cycle – 100ns memory 200 cycle memory latency! • Solution: Caches Cache Basics • Fast (but small) memory close to processor • When data referenced Key: Optimize the average memory – If in cache, use cache instead of memory access latency – If not in cache, bring into cache (actually, bring entire block of data, too) – Maybe have to kick something else out to do it! • Important decisions – – – – Placement: where in the cache can a block go? Identification: how do we find a block in cache? Replacement: what to kick out to make room in cache? Write policy: What do we do about .