tailieunhanh - Bài giảng Computer Organization and Architecture: Chapter 9

Computer Arithmetic thuộc Chapter 9 của "Bài giảng Computer Organization and Architecture" tập trung trình bày các vấn đề cơ bản về Arithmetic & Logic Unit; ALU Inputs and Outputs; Integer Representation; Sign-Magnitude;. | William Stallings Computer Organization and Architecture 6th Edition Chapter 9 Computer Arithmetic Arithmetic & Logic Unit Does the calculations Everything else in the computer is there to service this unit Handles integers May handle floating point (real) numbers May be separate FPU (maths co-processor) May be on chip separate FPU (486DX +) ALU Inputs and Outputs Integer Representation Only have 0 & 1 to represent everything Positive numbers stored in binary . 41=00101001 No minus sign No period Sign-Magnitude Two’s compliment Sign-Magnitude Left most bit is sign bit 0 means positive 1 means negative +18 = 00010010 -18 = 10010010 Problems Need to consider both sign and magnitude in arithmetic Two representations of zero (+0 and -0) Two’s Compliment +3 = 00000011 +2 = 00000010 +1 = 00000001 +0 = 00000000 -1 = 11111111 -2 = 11111110 -3 = 11111101 Benefits One representation of zero Arithmetic works easily (see later) Negating is fairly easy 3 = 00000011 . | William Stallings Computer Organization and Architecture 6th Edition Chapter 9 Computer Arithmetic Arithmetic & Logic Unit Does the calculations Everything else in the computer is there to service this unit Handles integers May handle floating point (real) numbers May be separate FPU (maths co-processor) May be on chip separate FPU (486DX +) ALU Inputs and Outputs Integer Representation Only have 0 & 1 to represent everything Positive numbers stored in binary . 41=00101001 No minus sign No period Sign-Magnitude Two’s compliment Sign-Magnitude Left most bit is sign bit 0 means positive 1 means negative +18 = 00010010 -18 = 10010010 Problems Need to consider both sign and magnitude in arithmetic Two representations of zero (+0 and -0) Two’s Compliment +3 = 00000011 +2 = 00000010 +1 = 00000001 +0 = 00000000 -1 = 11111111 -2 = 11111110 -3 = 11111101 Benefits One representation of zero Arithmetic works easily (see later) Negating is fairly easy 3 = 00000011 Boolean complement gives 11111100 Add 1 to LSB 11111101 Geometric Depiction of Twos Complement Integers Negation Special Case 1 0 = 00000000 Bitwise not 11111111 Add 1 to LSB +1 Result 1 00000000 Overflow is ignored, so: - 0 = 0 Negation Special Case 2 -128 = 10000000 bitwise not 01111111 Add 1 to LSB +1 Result 10000000 So: -(-128) = -128 X Monitor MSB (sign bit) It should change during negation Range of Numbers 8 bit 2s compliment +127 = 01111111 = 27 -1 -128 = 10000000 = -27 16 bit 2s compliment +32767 = 011111111 11111111 = 215 - 1 -32768 = 100000000 00000000 = -215 Conversion Between Lengths Positive number pack with leading zeros +18 = 0001 0010 +18 = 0000 0000 0001 0010 Negative numbers pack with leading ones -18 = 1110 1110 -18 = 1111 1111 1110 1110 . pack with MSB (sign bit) Addition and Subtraction Normal binary addition Monitor sign bit for overflow Take twos compliment of substahend and add to minuend . a - b = a + (-b) So we only need addition .