tailieunhanh - CMOS VLSI Design - Lecture 6: Power

Power and Energy Power is drawn from a voltage source attached to the VDD pin(s) of a chip. Instantaneous Power: P (t ) = I (t )V (t ) Energy: Average Power: 7: Power – Half the energy from VDD is dissipated in the pMOS transistor as heat, other half stored in capacitor When the gate output falls – Energy in capacitor is dumped to GND – Dissipated as heat in the nMOS transistor | Lecture 6 Power Outline Power and Energy Dynamic Power Static Power 7 Power CMOS VLSI Design 4th Ed 2 Power and Energy Power is drawn from a voltage source attached to the VDD pin s of a chip. Instantaneous Power P t Energy E Average Power Pv avg 7 Power CMOS VLSI Design 4th Ed

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