tailieunhanh - USB Complete fourth- P19

USB Complete fourth- P19:This book focuses on Windows programming for PCs, but other computers and operating systems also have USB support, including Linux and Apple Computer’s Macintosh. Some real-time kernels also support USB. | Chapter 6 Run Code from External Parallel Memory. If no EEPROM is detected or if the first byte isn t C0h or C2h and if EA is a logic high the chip boots from code memory on the external parallel data bus. ReNum is set to 1. The host enumerates the device and loads a driver and there is no re-enumeration. ARM For high-end applications many developers turn to ARM microcontrollers which have a fast efficient 32-bit RISC architecture. ARM Holdings licenses intellectual property IP cores to chip companies for use in their chips. The ARM family includes a range of cores with different capabilities. An example of an ARM processor with a USB device port is Atmel s AT91SAM7S321. The chip has a full-speed USB port 32 KB of flash memory for firmware and 8 KB of RAM. Other I O includes an 8-channel 10-bit analog-to-digital converter and synchronous and asynchronous serial ports. Programming can use the free GNU GCC compiler or a compiler from IAR Systems. NXP Semiconductors is another source for ARM-based device controllers. Controllers that Interface to CPUs A controller that interfaces to an external CPU enables adding USB to just about any CPU circuit. A disadvantage is the need to use two chips instead of having the CPU and USB controller on a single chip. Also example code for USB communications using your CPU might not be available. Some interface chips support a command set for USB-related communications while others use a series of registers to store USB data and configuration status and control information. Most interface chips have a local data bus with a parallel interface to communicate with the CPU. For fast transfers with external memory many chips support direct memory access DMA . To use DMA the CPU sets up a transfer that reads or writes a block of data to or from data memory without CPU intervention. For CPUs that don t have external parallel buses a few controllers can use a synchronous or asynchronous serial interface. An interrupt pin can signal the CPU .