tailieunhanh - Báo cáo hóa học: " FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài:FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing | EURASIP Journal on Applied Signal Processing 2005 7 1024-1034 2005 Hindawi Publishing Corporation FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing Cesar Torres-Huitzil Computer Science Department National-Institute for Astrophysics Optics and Electronics . Box 51 and 216 72000 Puebla Mexico Email ctorres@ Miguel Arias-Estrada Computer Science Department National Institute for Astrophysics Optics and Electronics . Box 51 and 216 72000 Puebla Mexico Email ariasm@ Received 13 September 2003 Revised 21 May 2004 Image processing requires more computational power and data throughput than most conventional processors can provide. Designing specific hardware can improve execution time and achieve better performance per unit of silicon area. A field-programmable-gate-array- FPGA- based configurable systolic architecture specially tailored for real-time window-based image operations is presented in this paper. The architecture is based on a 2D systolic array of 7 X 7 configurable window processors. The architecture was implemented on an FPGA to execute algorithms with window sizes up to 7 X 7 but the design is scalable to cover larger window sizes if required. The architecture reaches a throughput of GOPs at a 60 MHz clock frequency and a processing time of milliseconds for 7 X 7 generic window-based operators on 512 X 512 gray-level images. The architecture compares favorably with other architectures in terms of performance and hardware utilization. Theoretical and experimental results are presented to demonstrate the architecture effectiveness. Keywords and phrases FPGA configurable system real time window-based image processing systolic array. 1. INTRODUCTION Designing a hardware processor core for data-intensive image processing is a fundamental step in developing modern machine vision systems that can efficiently implement computer vision related tasks. The wide interest in data-intensive or window-based .