tailieunhanh - Báo cáo hóa học: " Nano-embossing technology on ferroelectric thin film Pb(Zr0.3,Ti0.7)O3 for multi-bit storage application"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Nano-embossing technology on ferroelectric thin film Pb()O3 for multi-bit storage application | Shen et al. Nanoscale Research Letters 2011 6 474 http content 6 1 474 o Nanoscale Research Letters a SpringerOpen Journal NANO EXPRESS Open Access Nano-embossing technology on ferroelectric thin film Pb O3 for multi-bit storage application 1 1 2 71 1 1 w 1 C Z-I 3 1 Zhenkui Shen Zhihui Chen Qian Lu Zhijun Qiu Anquan Jiang Xinping Qu Yifang Chen and Ran Liu Abstract In this work we apply nano-embossing technique to form a stagger structure in ferroelectric lead zirconate titanate Pb O3 PZT films and investigate the ferroelectric and electrical characterizations of the embossed and un-embossed regions respectively of the same films by using piezoresponse force microscopy PFM and Radiant Technologies Precision Material Analyzer. Attributed to the different layer thickness of the patterned ferroelectric thin film two distinctive coercive voltages have been obtained thereby allowing for a single ferroelectric memory cell to contain more than one bit of data. Introduction The development of miniaturized ferroelectric field effect transistors FeFETs and random access memories FeRAMs 1 2 has called for fabrication of high-quality ferroelectric nanostructures. How to retain excellent ferroelectricity in nanoscale patterned structures posts a great challenge as the small thickness of ultra thin films as well as the damages and defects introduced by the conventional photo lithography 3-6 could drastically degrade the ferroelectric properties. Better controlling the quality of the ultra-thin ferroelectric films and alternative patterning techniques are therefore highly required. It is widely understood that multi-bit operation could be one of the most efficient approaches to increase storage densities. In recent years a great deal of efforts has been made on realizing multi-value storage through circuit design. One of the drawbacks is the additional budget of densities in circuit integration. There have been rarely reports on .