tailieunhanh - Báo cáo hóa học: " Editorial Field-Programmable Gate Arrays in Embedded Systems"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Editorial Field-Programmable Gate Arrays in Embedded Systems | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2006 Article ID 51312 Pages 1-2 DOI ES 2006 51312 Editorial Field-Programmable Gate Arrays in Embedded Systems Miriam Leeser 1 Scott Hauck 2 and Russell Tessier3 1 Department of Electrical and Computer Engineering Northeastern University Boston MA 02115 USA 2 Department of Electrical Engineering University of Washington Seattle WA 98195-2500 USA 3 Department of Electrical and Computer Engineering University of Massachusetts Amherst MA 01003 USA Received 13 July 2006 Accepted 13 July 2006 Copyright 2006 Miriam Leeser et al. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. Welcome to the special issue on field programmable gate arrays FPGAs . FPGAs are becoming an increasingly important part of embedded systems as the collection of papers in this issue illustrates. An overview of reconfigurable hardware in embedded systems provides a comprehensive overview of the state-of-the-art use of reconfigurable hardware in embedded systems. A detailed discussion of the use of FPGAs for application areas such as encryption software-defined radio and robotics is provided. Additionally a concise assessment of design issues and current design tools is included. A sizable collection of citations provides a handy reference for newcomers to the field. The remaining papers address applications and tools for embedded systems design. The applications presented here are typical of the spectrum of FPGA applications. They fall into the categories of multimedia processing including video image and speech processing as well as communications applications. The implementation of an MPEG-4 image encoder using a scalable number of Altera NIOS soft processors is presented in Scalable MPEG-4 encoder of FPGA multiprocessor SOC. An image is partitioned so that