tailieunhanh - Computer main board defect post card
CODE CODE 00 Award Award AMI AMI Code copying to specific areas is done. Passing control to INT 19h boot loader next. CPU is testing the register inside or failed, please change the CPU and check it. 01 Processor Test 1, Processor status (1FLAGS) verification. Test the following processor status flags: carry, zero, sign, overflow. The BIOS sets each flag, verifies they are set, then turns each flag off and verifies it is off. Test All CPU Registers Except SS, SP, and BP with Data FF and 00 Disable NMI, PIE, AIE, UEI, SQWV. Disable video, parity checking, DMA. Reset. | Computer main board defect post card CODE Award AMI Tandy3000 CODE Award AMI Tandy3000 00 Code copying to specific areas is done. Passing control to INT 19h boot loader next. 01 Processor Test 1 Processor status 1FLAGS verification. Test the following processor status flags carry zero sign overflow. CPU is testing the register inside or failed please change the CPU and check it. The BIOS sets each flag verifies they are set then turns each flag off and verifies it is off. 02 Test All CPU Registers Except SS SP and BP with Data FF and 00 Verify Real Mode 03 Disable NMI PIE AIE UEI SQWV. The NMI is disabled. Next checking for a soft reset or a power on condition Disable Not masked Interrupt NMI Disable video parity checking DMA. Reset math coprocessor. Clear all page registers CMOS shutdown byte. Initialize timer 0 1 and2 including set EISA timer to a known state. Initialize DMA controllers 0 and 1. Initialize interrupt controllers 0 and 1. Initialize EISA extended registers. 04 RAM must be periodically refreshed to keep the memory from decaying. This refresh function is working properly. Get CPU type 05 Keyboard Controller Initialization The BIOS stack has been built. Next disabling cache memory. DMA initialization in progress or failure CODE Award AMI Tandy3000 06 Reserved Uncompressing the POST code next. Initialize system hardware 07 Verifies CMOS is Working Correctly Detects Bad Battery Next initializing the CPU and the CPU data area Disable shadow and execute code from the ROM. 08 Early chip set initialization The CMOS checksum calculation is Initialize chipset with initial POST values Memory presence test OEM chip set routines Clear low 64K memory Test first 64K memory 09 Cyrix CPU initialization Set IN POST flag Cache initialization 0A Initialize first 120 interrupt vectors with SPURIOUS-INT-HDLR and initialize INT 00h-1Fh according to INT-TBL. The CMOS checksum calculation is done. Initializing the CMOS status register for .
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