tailieunhanh - SystemVerilog For Design phần 8

Sử dụng giao diện như cổng mô-đun Với SystemVerilog, một cổng của một module có thể được khai báo là một kiểu giao diện, thay vì đầu vào Verilog, đầu ra hoặc hướng cổng INOUT. Rõ ràng tên là các cổng giao diện một cổng module cổng module có thể được khai báo rõ ràng là một loại hình cụ thể của intercan là phải đối mặt với tên. | Chapter 10 SystemVerilog Interfaces 277 interfaces can be limited to specific hierarchy scopes An interface definition can be nested within a module making the name of the interface local to that module. Only the containing module can instantiate a locally declared interface. This allows the use of an interface to be limited to just one portion of the design hierarchy such as to just within an IP model. Using interfaces as module ports With SystemVerilog a port of a module can be declared as an interface type instead of the Verilog input output or inout port directions. Explicitly named interface ports a module port A module port can be explicitly declared as a specific type of intercan be the name face. This is done by using the name of an interface as the port type. of an interface The syntax is module module name interface name port name For example interface chip_bus . endinterface module CACHE chip_bus pins interface port input clock . endmodule An explicitly named interface port can only be connected to an interface of the same name. An error will occur if any other interface definition is connected to the port. Explicitly named interface ports ensure that a wrong interface can never be inadvertently connected to the port. Explicitly naming the interface type that can be connected to the port also serves to document directly within the port declaration exactly how the port is intended to be used. 278 SystemVerilog for Design Generic interface ports a port can be A generic interface port defines the port type using the keyword declared using interface instead of a using the name of a specific interface the interface type. The syntax is keyword module module_name interface port_name When the module is instantiated any interface can be connected to the generic interface port. This provides flexibility in that the same module can be used in multiple ways with different interfaces connected to the module. In the following example module RAM is .