tailieunhanh - Model-Based Design for Embedded Systems- P37

Model-Based Design for Embedded Systems- P37: This book contains information obtained from authentic and highly regarded sources. Reasonable efforts have been made to publish reliable data and information, but the author and publisher cannot assume responsibility for the validity of all materials or the consequences of their use. | 326 Model-Based Design for Embedded Systems 1 1 1 1 FPGA GPP DSP FPGA 1 1 1 1 DSRC ASIC FPGA GPP 1 1 1 1 DSRC DSRC FPGA DSP 1 1 ASIC GPP ASIC DSRC 1 1 1 1 FIGURE A heterogenous SoC template. A multicore organization can contribute to the energy efficiency of a SoC. The best energy savings can be obtained by simply switching off cores that are not used which also helps in reducing the static power consumption. Furthermore the processing of local data in small autonomous cores abides by the locality of reference principle. Moreover a core processor can be adaptive it does not have to run at full clock speed to achieve the required QoS at a particular moment in time. When one of the cores is discovered to be defect either because of a manufacturing fault or discovered at operating time by the built-in diagnosis this defective core can be switched off and isolated from the rest of the design. A multicore approach also eases verification of an integrated circuit design since the design of identical cores has to be verified only once. The design of a single core is relatively simple and therefore a lot of effort can be put in area power optimizations on the physical level of integrated circuit design. The computational power of a multicore architecture scales linearly with the number of cores. The more cores there are on a chip the more computations can be done in parallel provided that the network capacity scales with the number of cores and there is sufficient parallelism in the application . Although cores operate together in a complex system an individual tile operates quite autonomously. In a reconfigurable multicore architecture every processing core is configured independently. In fact a core is a natural unit of partial reconfiguration. Unused cores can be configured for a new task while at the same time other cores continue performing their tasks. That is to say a multicore architecture can be reconfigured partly and dynamically. Reconfigurable MultiCore .