tailieunhanh - Digital logic testing and simulation phần 5

Tuy nhiên, trong trường hợp hiện tại một tiêu chí bổ sung có thể tồn tại. Nếu một lỗi trên một trong hai đầu vào đến cổng 14 đã được phát hiện, sau đó D1 tín hiệu linh hoạt hoặc D2 tương ứng với các lỗi đầu vào không bị phát hiện có thể được ưa chuộng khi một sự lựa chọn phải được thực hiện. | SEQUENTIAL TEST METHODS 257 conflict. For purposes of illustration we select Yơ2. It requires a D from input Vand a 0 from input U. Table is used to justify the D. The column with header D reveals that a D occurs at the input to Y if V is true while at rest A or if it is presently true but toggles false T at the next time frame. Since no cubes exist in Table with a T on the output of V we check entries from Table with A and find by going across to the left that they result from intersection with either an A or t on the output of V. From the D-cubes for Vin Table Vơ4 is selected. Finally in similar fashion a 0 is justified on U by means of cube Ua. Four cubes have now been identified that extend a sensitized path back from output Z to primary inputs and other elements. Before continuing we point out that the sensitized path extends through both logic and time since the cubes impose switching conditions as well as logic values. As a result intersections are more complex and require attention to more detail than is the case with the D-algorithm. Some cubes must be intersected in the same time frame and others linked by synchronous switching conditions are used to satisfy conditions required in the preceding time frame. Consider the first D-cube selected Zơ1. It creates a t on the output of Z by assigning a 1 and a d to the inputs of the AND gate. The 1 is satisfied by assigning a 1 to input F. The d which is an asynchronous D must be justified in the present time frame. This is accomplished by intersecting Zơ1 with the second cube previously selected Yơ2. Performing the intersection according to the rules in Table we obtain the following t X X d X X X X X 1 Za1 X 0 D t X X X X 1 0 X YƠ2 t 0 D t X X X X 1 0 1 The resultant cube applies a 0 to the Set input of flip-flop Y The fourth cube previously selected Ua which was chosen to justify the 0 on the Set input is asynchronously coupled to Y via the unclocked Set input. Therefore according to the .