tailieunhanh - High Level Synthesis: from Algorithm to Digital Circuit- P28

High Level Synthesis: from Algorithm to Digital Circuit- P28: This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. "High-Level Synthesis: from Algorithm to Digital Circuit" should be on each designer's and CAD developer's shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design. | 260 . Molina et al. Table Schedule and binding based on operation fragmentations Operation Fragmentation Cycle 1 Cycle 2 Cycle 3 E A x B 4 x 4 F C x D 4 x 4 G E F 8 I H x G I1 H x 8 x 4 I2 x 4 x 4 13 x 4 x 4 I4 I2 8 I5 000 13 8 L J K 8 N L x M N1 L x 8 x 4 N2 L x 8 x 4 N3 x 4 x 4 N4 x 4 x 4 N5 N3 8 N6 N4 000 8 N7 N1 000 N6 12 R P Q R1 12 R2 12 Fig. Execution of operation N L x M in cycle 3 14 Exploiting Bit-Level Design Techniques in Behavioural Synthesis 261 Table Main features of the synthesized implementations Conventional Proposed Saved Datapath FUs 012 x 8 04 x 4 24 08 x 4 2 0 4 x 4 12 2 8 FU s area 1 401 inverters 911 inverters 35 Circuit area 3 324 inverters 2 298 inverters Cycle length ns ns In the second implementation of this example every datapath FU is used once per cycle to execute one operation of its same width and therefore the HW waste present in the conventional implementation has been totally removed. The circuit area including FUs registers multiplexers and controller and the cycle length have been reduced around 31 and 7 respectively as summarized in Table . Design Techniques to Reduce the HW Waste The first step to reduce the HW waste present in conventional implementations becomes the extraction of the common operative kernel of operations in the behavioural specification. This implies the fragmentation of compatible operations that can be executed over FUs of a same type into their common operative kernel plus some glue logic. These transformations can be applied not only to trivial cases like the compatibility between additions and subtractions but to more complex ones like the compatibility between additions and multiplications. The common operative kernel extraction increments the number of operations that can be executed over the same HW resources and in consequence helps augment the

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