tailieunhanh - Radio Frequency Identification Fundamentals and Applications, Design Methods and Solutions Part 2

Tham khảo tài liệu 'radio frequency identification fundamentals and applications, design methods and solutions part 2', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | Design Considerations for the Digital Core of a C1G2 RFID Tag 17 Fig. 2. Architecture of the low power C1G2 digital core. Working state STRTP STDBY RX CNTRL TX PM ON ON ON ON ON Symbol detector OFF ON ON OFF OFF Command decoder OFF OFF ON OFF OFF Control ON OFF OFF ON OFF Memory access ON OFF ON ON ON VEEPROM ON OFF OFF ON OFF TX OFF OFF OFF OFF ON Table 1. Working states of the digital core. transmission. In this state only the symbol detector is active. When the beginning of a new message from the reader is detected the command decoder is activated and the working state turns to RX. After receiving the whole message the working state changes to CTRL deactivating the command decoder and the symbol detector and activating the control and the register bank. Finally in the TX state the response is sent to the reader and the working state returns to STDBY. Reading from the EEPROM is one of the most power hungry operations that the tag performs. In the design presented in this chapter the EEPROM is read when a lot of energy is arriving to the tag. Then the read data is stored in VEEPROM which is less power hungry. This way if data from the EEPROM is needed when less energy is available they can be read from VEEPROM instead of from EEPROM. The introduction of this module allows reshaping the power distribution so that the power peaks caused by the accesses to EEPROM can be moved to less critical time intervals. In exchange the tag spends more time initializing as it must copy the data from the EEPROM to the VEEPROM. 18 Radio Frequency Identification Fundamentals and Applications Design Methods and Solutions 3. Analysis of the clock signal requirements As the power consumption of the digital core grows with the clock frequency the selection of a minimum clock frequency will maximize the communication range. In the following a detailed study of the clock signal constraints for C1G2 communication is presented. This study shows that the minimum required clock frequency .