tailieunhanh - Electronic Navigation Systems 3 Part 7

Tham khảo tài liệu 'electronic navigation systems 3 part 7', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | Satellite navigation 169 Because of limited satellite transmitter power spread spectrum modulation techniques and ionospheric attenuation the satellite signal power received at the earth s surface is far less than the receiver s natural or thermal noise level. This minute signal is received by a compact fixed above-deck unit using an isotropic antenna with ground plane radial reflectors a low noise pre-amplifier and filters. Circularly polarized radio waves from the SV are received by the isotropic antenna whilst the radial reflectors reduce the problem of multipath errors caused by the earth s surface reflected signals. The head unit should be mounted in such a way that the antenna has a clear view of the whole area in azimuth from the zenith to the horizon. Input to the receiver is therefore the amplified SV signal at MHz plus a slight Doppler frequency shift and possessing a very poor signal-to-noise ratio. The single signal mixer down-converts the L1 carrier to an intermediate frequency. Frequency conversion is achieved using a Variable Frequency Local Oscillator VCXO under the control of both the Central Processing Unit CPU and a signal derived Automatic Frequency Control AFC . CPU input to the VCXO enables initial SV tracking to be achieved and the tiny direct current AFC derived from the received signal maintains this lock. A wideband IF amplifier is used to permit reception of the MHz bandwidth P code enabling future modification of the receiver to be made if required. Output from this amplifier is coupled to a correlator along with the locally generated PRN C A code. It is essential that the receiver tracks the received signal precisely despite the fact that it is at an amplitude which is hardly above the locally generated noise level. To achieve tracking the received signal is applied to a Delay Lock Loop DLL code tracking circuit that is able to synchronize the locally generated PRN code by means of the EPOCH datum point with the received .