tailieunhanh - Fundamentals of Digital Electronics - Lab 5

Pseudo-Random Number Generators Trong phòng thí nghiệm cuối cùng, quầy chuông đơn giản đã được giới thiệu như một phương tiện xây dựng quầy modulo-n. Trong phòng thí nghiệm này, thông tin phản hồi từ một sự kết hợp của giai đoạn tiên tiến được kết hợp và chuyển trở lại vào cửa khẩu đầu vào. Nếu sự kết hợp chính xác là lựa chọn, đầu ra là chiều dài tối đa (có nghĩa là, các mô đun của bộ đếm là 2N-1). Đối với một truy cập 8-bit, N = 8 và (2N-1) = 255. Những mạch này, thường. | Lab 5 Pseudo-Random Number Generators In the last lab simple ring counters were introduced as a means of building modulo-n counters. In this lab feedback from a combination of advanced stages is combined and routed back into the input gate. If the correct combination is chosen the output is of maximal length that is the modulus of the counter is 2N-1 . For an 8-bit counter N 8 and 2N-1 255. These circuits often called pseudo-random number generators PRNG have some interesting features. The sequences formed appear to be random over the short range but in fact the sequence repeats after 2N-1 cycles. Furthermore each pattern occurs only once during each sequence of 2N-1 numbers. Pseudo-random sequence and number generators have wide applications in computer security cryptography audio systems testing bit error testing and secure communications. A 6-Bit Pseudo-Random Number Generator In the following circuit the outputs of the fifth and sixth D-latches have been exclusive NORed together to become the input to the shift register. It is assumed that initially all outputs are zero. Figure 5-1. 6-Bit PRNG Built from Six D-Latches and an XOR Gate National Instruments Corporation 5-1 Fundamentals of Digital Electronics Lab 5 Pseudo-Random Number Generators When Q5 and Q6 are 0 the output of the NXOR see Lab 1 is 1. This HI value is loaded into the shift register at the input D1. On command from the clock all bits shift to the right. The initial value of 000000 goes to 100000 . It is easy to work through a few cycles to see the outputs follow the sequence 000000 100000 110000 111000 After 63 cycles the sequence returns to the initial state 000000 . It is easy to simulate this circuit with a LabVIEW VI. Figure 5-2. LabVIEW VI to Simulate a 6-Bit PRNG A six-element shift register is placed on a While Loop. An exclusive OR gate and inverter are used for the NXOR gate whose inputs have been wired to Q5 and Q6. The loop index keeps track of the cycle count and a delay of 500