tailieunhanh - Circuits & Electronics P23

Energy, CMOS Fall 2000 Lecture 23 1 .Review VS RL vI vO RON T1: closed T2: open R VS P= RL + RON 2 1 open closed S2 R2 VS + – S1 C 1 T = T1 + T2 = f P = CVS f 2 Reading: Section of A & L. Fall 2000 Lecture 23 2 .Review Inverter — vI VS RL vO RON C Demo 1 Square wave input T= f 2 VS 2 P= + CVS f 2 RL RL RON T " RC" 2 time constant P STATIC P DYNAMIC independent of f. MOSFET ON half the time. In standby mode, half the gates in a chip can be assumed to be on. So P STATIC per gate is still VS2 . 2RL related to switching capacitor. In standby mode, f 0,. | CIRCUITS AND ELECTRONICS Energy CMOS Fall 2000 Lecture 23 1 Review tVs Rl v I o---------o Ovo Ron P Vs 2 Rl Ron T1 closed T2 oPen ri WV S1 open closed S 2 Vs C 2 T T T - 1 2 f P CVS 2J Reading Section of A L. Fall 2000 Lecture 23 2 Review Inverter rl Q vo v Ron C Square wave input V 2 P VS- 2 Rr L T -f CVS 2f emo P STATIC independent of f. MOSFET ON half the time. RL RON T RC 2 time constant Pdynamic related to switching capacitor. In standby mode half the gates in a chip can be assumed to be on. So Pstatic Per gate is still V2 . S In standby mode f 0 so dynamic power is 0 2R Fall 2000 Lecture 23