tailieunhanh - Real-Time Embedded Multithreading Using ThreadX and MIPS- P4

Real-Time Embedded Multithreading Using ThreadX and MIPS- P4:Although the history of embedded systems is relatively short, 1 the advances and successes of this fi eld have been profound. Embedded systems are found in a vast array of applications such as consumer electronics, “ smart ” devices, communication equipment, automobiles, desktop computers, and medical equipment. | MIPS Exception Handling 57 .text .globl reset_vector mfc0 li and mtc0 lui addi j nop _reset_vector 8 12 9 OxFFBFFFFF 8 8 9 8 12 8 hi __start 8 8 lo __start 8 Address OxBFCOOOOO Build mask to clear BEV bit Clear BEV bit Use normal vector area Build address of _start routine Jump to _start .text .globl _tx_exception_vector 26 _tx_exception_handler 26 _tx_exception_vector la j nop Address 0x80000180 Pickup exception handler address Jump to exception handler Delay slot Figure ThreadX vector area There are several different ways to initialize the exception vector. You can set it up by loading it directly to address 0x80000180 with a JTAG debug device. Alternatively your system may copy the exception vector to address 0x80000180 during initialization. The exception vector handler is typically located in the ThreadX low-level initialization file and may be modified according to application needs. For example in many applications the reset vector will actually point to some low-level application code that is responsible for preparing the hardware memory for execution. This code can also copy itself from flash memory to RAM if that is necessary for the application. Note that ThreadX can execute in place out of flash memory or in RAM. Once finished the application low-level code must jump to the same location specified in the original reset vector. For example suppose a low-level initialization routine called my_low_level_init is required to execute before anything else in the system. The application would have to change the reset vector to point to the routine in Figure . Coo HL A I e OA V R is w ne r a r k Please purchase PDF Split-Merge on . 58 Chapter 6 .globl reset_vector mfc0 li and mtc0 lui addi j nop _reset_vector 8 12 9 OxFFBFFFFF 8 8 9 8 12 8 hi __my_low_level_init 8 8 lo __my_low_level_init 8 Address 0xBFC00000 Pickup SR Build mask to clear BEV bit Clear BEV bit Use normal vector area Build address of