tailieunhanh - Daflow Modeling part 2

[ Team LiB ] Expressions, Operators, and Operands Dataflow modeling describes the design in terms of expressions instead of primitive gates. Expressions, operators, and operands form the basis of dataflow modeling. | Team LiB Expressions Operators and Operands Dataflow modeling describes the design in terms of expressions instead of primitive gates. Expressions operators and operands form the basis of dataflow modeling. Expressions Expressions are constructs that combine operators and operands to produce a result. Examples of expressions. Combines operands and operators a A b addr1 20 17 addr2 20 17 ini in2 Operands Operands can be any one of the data types defined in Section Data Types. Some constructs will take only certain types of operands. Operands can be constants integers real numbers nets registers times bit-select one bit of vector net or a vector register part-select selected bits of the vector net or register vector and memories or function calls functions are discussed later . integer count final_count final_count count 1 count is an integer operand real a b c c a - b a and b are real operands reg 15 0 reg1 reg2 reg 3 0 reg_out reg_out reg1 3 0 a reg2 3 0 reg1 3 0 and reg2 3 0 are part-select register operands reg ret_value ret_value calculate_parity A B calculate_parity is a function type operand Operators Operators act on the operands to produce desired results. Verilog provides various types of operators. Operator types are discussed in detail in Section Operator Types. dl d2 is an operator on operands dl and d2 a 0 is an operator on operand a 0 B 1 is an operator on operands B and 1 Team LiB Team LiB Exercises 1 A full subtractor has three 1-bit inputs x y and z previous borrow and two 1-bit outputs D difference and B borrow . The logic equations for D and B are as follows D x .y .z x . .z B x .y x .z Write the full Verilog description for the full subtractor module including I O ports Remember that in logic equations corresponds to a logical or operator in dataflow . Instantiate the subtractor inside a stimulus block and test all eight possible combinations of x y and z given in the following truth table. x y