tailieunhanh - Overview Of Degital Design With Verilog HDL part 2

[ Team LiB ] Emergence of HDLs For a long time, programming languages such as FORTRAN, Pascal, and C were being used to describe computer programs that were sequential in nature. Similarly, in the digital design field, designers felt the need for a standard language | Team LiB Emergence of HDLs For a long time programming languages such as FORTRAN Pascal and C were being used to describe computer programs that were sequential in nature. Similarly in the digital design field designers felt the need for a standard language to describe digital circuits. Thus Hardware Description Languages HDLs came into existence. HDLs allowed the designers to model the concurrency of processes found in hardware elements. Hardware description languages such as Verilog HDL and VHDL became popular. Verilog HDL originated in 1983 at Gateway Design Automation. Later VHDL was developed under contract from DARPA. Both Verilog and VHDL simulators to simulate large digital circuits quickly gained acceptance from designers. Even though HDLs were popular for logic verification designers had to manually translate the HDL-based design into a schematic circuit with interconnections between gates. The advent of logic synthesis in the late 1980s changed the design methodology radically. Digital circuits could be described at a register transfer level RTL by use of an HDL. Thus the designer had to specify how the data flows between registers and how the design processes the data. The details of gates and their interconnections to implement the circuit were automatically extracted by logic synthesis tools from the RTL description. Thus logic synthesis pushed the HDLs into the forefront of digital design. Designers no longer had to manually place gates to build digital circuits. They could describe complex circuits at an abstract level in terms of functionality and data flow by designing those circuits in HDLs. Logic synthesis tools would implement the specified functionality in terms of gates and gate interconnections. HDLs also began to be used for system-level design. HDLs were used for simulation of system boards interconnect buses FPGAs Field Programmable Gate Arrays and PALs Programmable Array Logic . A common approach is to design each IC chip using an .

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