tailieunhanh - Lecture Operating systems: A concept-based approach: Chapter 10 - Dhananjay M. Dhamdhere

Presence of many CPUs in a multiprocessor computer system holds the promise of high throughput and fast response to applications. This chapter discusses different kinds of multiprocessor systems, and describes how the OS achieves high throughput and fast response by using special techniques of structuring its kernel, so that many CPUs can execute kernel code in parallel, and of synchronizing and scheduling processes. | Chapter 10 Synchronization and Scheduling in Multiprocessor Operating Systems Copyright © 2008 Operating Systems, by Dhananjay Dhamdhere Introduction Architecture of Multiprocessor Systems Issues in Multiprocessor Operating Systems Kernel Structure Process Synchronization Process Scheduling Case Studies 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems Performance of uniprocessor systems depends on CPU and memory performance, and Caches Further improvements in system performance can be obtained only by using multiple CPUs 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) Use of a cache coherence protocol is crucial to ensure that caches do not contain stale copies of data Snooping-based approach (bus interconnection) CPU snoops on the bus to analyze traffic and eliminate stale . | Chapter 10 Synchronization and Scheduling in Multiprocessor Operating Systems Copyright © 2008 Operating Systems, by Dhananjay Dhamdhere Introduction Architecture of Multiprocessor Systems Issues in Multiprocessor Operating Systems Kernel Structure Process Synchronization Process Scheduling Case Studies 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems Performance of uniprocessor systems depends on CPU and memory performance, and Caches Further improvements in system performance can be obtained only by using multiple CPUs 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) Use of a cache coherence protocol is crucial to ensure that caches do not contain stale copies of data Snooping-based approach (bus interconnection) CPU snoops on the bus to analyze traffic and eliminate stale copies Write-invalidate variant At a write, CPU updates memory and invalidates copies in other caches Directory-based approach Directory contains information about copies in caches TLB coherence is an analogous problem Solution: TLB shootdown action 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) Multiprocessor Systems are classified according to the manner of associating CPUs and memory units Uniform memory access (UMA) architecture Previously called tightly coupled multiprocessor Also called symmetrical multiprocessor (SMP) Examples: Balance system and VAX 8800 Nonuniform memory access (NUMA) architecture Examples: HP AlphaServer and IBMNUMA-Q No-remote-memory-access (NORMA) architecture Example: Hypercube system by Intel Is actually a distributed system (discussed later) 10. Operating Systems, by Dhananjay Dhamdhere Architecture of Multiprocessor Systems (continued) 10. Operating Systems, by Dhananjay Dhamdhere

• Hệ điều hành
• Multiprocessor operating systems
• Operating systems
• Lecture Operating systems
• Structure of operating systems
• Distributed operating systems
• Memory management