tailieunhanh - Lecture VLSI Digital signal processing systems: Chapter 14 - Keshab K. Parhi

Chapter 14 includes content: Redundant number representations, hybrid radix-2 addition, hybrid radix-2 subtraction, hybrid radix-2 addition/subtraction, signed binary digit (SBD) addition/subtraction, maximally redundant hybrid radix-4 addition,. | Chapter 14: Redundant Arithmetic Keshab K. Parhi • A non-redundant radix-r number has digits from the set{0, 1, , r - 1} and all numbers can be represented in a unique way. • A radix-r redundant signed-digit number system is based on digit set S ≡ {-β, -(β - 1), , -1, 0, 1, ,α}, where, 1 ≤ β, α ≤ r - 1. • The digit set S contains more than r values ⇒ multiple representations for any number in signed digit format. Hence, the name redundant. • A symmetric signed digit has α = β. • Carry-free addition is an attractive property of redundant signed-digit numbers. This allows most significant digit (msd) first redundant arithmetic, also called on-line arithmetic. Chap. 14 2 Redundant Number Representations • A symmetric signed-digit representation uses the digit set D = {-α, , -1, 0, 1, , α}, where r is the radix and α the largest digit in the set. A number in this representation is written as : X = x0 = ∑ xW-1- iri The sign of the number is given by the sign of the most significant non-zero digit. Digit Set D α Redundancy Factor ρ Incomplete ½ Minimally redundant = r/2 > ½ and r-1 >1 Chap. 14 3 Hybrid Radix-2 Addition S = X + Y where, X = x0 , Y = y0. The addition is carried out in two steps : 1. The 1st step is carried out in parallel for all the bit positions. An intermediate sum pi = xi + yi is computed, which lies in the range {1, 0, 1, 2}. The addition is expressed as: xi + yi = 2ti + ui, where ti is the transfer digit and has value 0 or 1, and is denoted as ti+ ; ui is the interim sum and has value either 1 or 0 and is denoted as -ui-. t-1 is assigned the value of 0. 2. The sum digits si are formed as follows: si = ti-1+ - ui- Chap. 14 4 Digit Radix 2 Digit Set Binary Code xi {1, 0, 1} yi {0, 1} xi + - xi - pi = xi + yi {1, 0, 1, 2} ui {1, 0} ti {0, 1} si = ui + ti-1 {1, 0, 1} yi+ 2ti + ui -uiti+ si+ - si- Eight-digit hybrid radix-2 adder Chap. .

• Điện - Điện tử
• VLSI Digital signal processing systems
• Digital signal
• Digital signal processing
• DSP systems
• Redundant arithmetic
• Redundant number representations
• FIR Digital Filters
• Parallel processing
• Loop bound
• DSP programs
• Retiming formulation
• Applications of retiming
• Algorithm for unfolding
• Applications of unfolding
• Retiming for folding
• Systolic architecture design
• Projection vector
• Cook toom algorithm
• Fast convolution
• Algorithmic strength reduction
• Parallel FIR filters
• Adaptive filters
• Parallel pecursive
• Round off noise
• State variable description
• Bit level arithmetic architectures
• Parallel multipliers
• Numerical strength reduction
• Multiple constant multiplication
• Low power design
• Programmable DSPs
• DSP applications