tailieunhanh - Lecture VLSI Digital signal processing systems: Chapter 1, 2 - Keshab K. Parhi

Chapter 1, 2 introduction to DSP Systems and iteration bound. The main contents of this chapter include all of the following: Typical DSP programs, loop bound, iteration bound. | VLSI Digital Signal Processing Systems Keshab K. Parhi VLSI Digital Signal Processing Systems • Textbook: – . Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, John Wiley, 1999 • Buy Textbook: – – – Chap. 2 2 Chapter 1. Introduction to DSP Systems • Introduction (Read Sec. , ) • Non-Terminating Programs Require Real-Time Operations • Applications dictate different speed constraints (., voice, audio, cable modem, settop box, Gigabit ethernet, 3-D Graphics) • Need to design Families of Architectures for specified algorithm complexity and speed constraints • Representations of DSP Algorithms (Sec. ) Chap. 2 3 Typical DSP Programs • Usually highly real-time, design hardware and/or software to meet the application speed constraint samples in DSP System out • Non-terminating – Example: for n = 1 to ∞ y ( n ) = a ⋅ x ( n ) + b ⋅ x ( n − 1) + c ⋅ x ( n − 2 ) end 3T 2T T 0 nT . Algorithms out signals Chap. 2 4 Area-Speed-Power Tradeoffs • 3-Dimensional Optimization (Area, Speed, Power) • Achieve Required Speed, Area-Power Tradeoffs • Power Consumption P = C ⋅V 2 ⋅ f • Latency reduction Techniques => Increase in speed or power reduction through lower supply voltage operation • Since the capacitance of the multiplier is usually dominant, reduction of the number of multiplications is important (this is possible through strength reduction) Chap. .

• Điện - Điện tử
• VLSI Digital signal processing systems
• Digital signal
• Digital signal processing
• DSP systems
• Loop bound
• DSP programs
• FIR Digital Filters
• Parallel processing
• Retiming formulation
• Applications of retiming
• Algorithm for unfolding
• Applications of unfolding
• Retiming for folding
• Systolic architecture design
• Projection vector
• Cook toom algorithm
• Fast convolution
• Algorithmic strength reduction
• Parallel FIR filters
• Adaptive filters
• Parallel pecursive
• Round off noise
• State variable description
• Bit level arithmetic architectures
• Parallel multipliers
• Redundant arithmetic
• Redundant number representations
• Numerical strength reduction
• Multiple constant multiplication
• Low power design
• Programmable DSPs
• DSP applications