tailieunhanh - Lecture Introduction to computing systems (from bits & gates to C & beyond): Chapter 4 - Yale N. Patt, Sanjay J. Patel

Chapter 4 - The von Neumann Model. This chapter presents the following content: Putting it all together, the von Neumann Model - 1, the von Neumann Model - 2,. the LC-3 as a von Neumann machine, instruction cycle - overview, types of instruction,. | Chapter 4 The Von Neumann Model Basic components Instruction processing Notations Sets of Bits A[3:0] denotes a set of 4 bits: A0, A1, A2, A3 The content of an n-bit register R is referred to as R[n-1:0] Rn-1 is the most significant bit (MSB), or leftmost bit R0 is the least significant bit (LSB), or rightmost bit Given R[31:0], R[7:4] refers to the four bits from R4 to R7 Bit Assignment R[5:0] I[13:8] Means that bits 5 to 0 of register R get assigned the values of bits 13 to 8 of register I. 4 - The von Neumann Model - 1 Memory: holds the instructions and data Processing Unit: processes the information Input: external information into the memory Output: produces results for the user Control Unit: manages computer activity Memory Processing Unit Input Output MAR MDR ALU TEMP Control Unit PC IR *keyboard *monitor 4 - The von Neumann Model - 2 Memory (RAM) Each location has an address and contents Address: set of bits that uniquely identify a memory location (eg. 20 bits gives an address space of 220 locations) Addressability (Byte vs. Word): Note: a Word is the basic unit of data used by the processing unit (usually multiple bytes) The size of the memory location referenced by a given address Input & Output LC2 deals only with keyboard and monitor More details later 4 - The von Neumann Model - 3 Processing Unit ALU (Arithmetic and Logic Unit) Generally operates on entire words of data Some also work on subsets of words (eg. bits and bytes) Registers: Small, fast “on-board” storage for words Close to the ALU (much faster access than RAM) Control Unit Program Counter (PC) or Instruction Pointer Holds the address of the next instruction to be executed Instruction Register (IR) Holds the instruction being executed The control unit coordinates all actions needed to execute the instruction 4 - The LC-2 Data and Control Paths 4 - LC 2 Instructions Instruction word: 16 bits Opcode defines (names) the instruction to be executed bits[15:12]: 4 bits . | Chapter 4 The Von Neumann Model Basic components Instruction processing Notations Sets of Bits A[3:0] denotes a set of 4 bits: A0, A1, A2, A3 The content of an n-bit register R is referred to as R[n-1:0] Rn-1 is the most significant bit (MSB), or leftmost bit R0 is the least significant bit (LSB), or rightmost bit Given R[31:0], R[7:4] refers to the four bits from R4 to R7 Bit Assignment R[5:0] I[13:8] Means that bits 5 to 0 of register R get assigned the values of bits 13 to 8 of register I. 4 - The von Neumann Model - 1 Memory: holds the instructions and data Processing Unit: processes the information Input: external information into the memory Output: produces results for the user Control Unit: manages computer activity Memory Processing Unit Input Output MAR MDR ALU TEMP Control Unit PC IR *keyboard *monitor 4 - The von Neumann Model - 2 Memory (RAM) Each location has an address and contents Address: set of bits that uniquely identify a memory location (eg. 20 bits gives

• Phần cứng
• Computing systems
• Introduction to computing systems
• Computing machines
• Computer organization
• The von Neumann Model
• Instruction cycle
• General purpose computers
• Data types
• Decimal numbers
• Digital logic structures
• Electronic ones
• Operate instructions
• Data movement instructions
• LC 2 assembly language
• Assembly language instructions
• Device registers
• I O basics
• TRAP routines
• Privileged instructions
• Stack data structure
• Interrupt I O
• LC 3 instruction set architecture
• LC 3 data path
• Problem solving
• Structured programming
• Machine architecture
• Unsigned integers
• Von Neumann machine
• Instruction set architecture