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Lecture Operating System: Chapter 08 - University of Technology

Lecture Operating System: Chapter 08 - Multiple Processor Systems presented Multiprocessors, Multicomputers, Distributed systems. | Multiple Processor Systems Chapter 8 8.1 Multiprocessors 8.2 Multicomputers 8.3 Distributed systems * Multiprocessor Systems Continuous need for faster computers shared memory model message passing multiprocessor wide area distributed system * Multiprocessors Definition: A computer system in which two or more CPUs share full access to a common RAM * Multiprocessor Hardware (1) Bus-based multiprocessors * Multiprocessor Hardware (2) UMA Multiprocessor using a crossbar switch * Multiprocessor Hardware (3) UMA multiprocessors using multistage switching networks can be built from 2x2 switches (a) 2x2 switch (b) Message format * Multiprocessor Hardware (4) Omega Switching Network * Multiprocessor Hardware (5) NUMA Multiprocessor Characteristics Single address space visible to all CPUs Access to remote memory via commands LOAD STORE Access to remote memory slower than to local * Multiprocessor Hardware (6) (a) 256-node directory based multiprocessor (b) . | Multiple Processor Systems Chapter 8 8.1 Multiprocessors 8.2 Multicomputers 8.3 Distributed systems * Multiprocessor Systems Continuous need for faster computers shared memory model message passing multiprocessor wide area distributed system * Multiprocessors Definition: A computer system in which two or more CPUs share full access to a common RAM * Multiprocessor Hardware (1) Bus-based multiprocessors * Multiprocessor Hardware (2) UMA Multiprocessor using a crossbar switch * Multiprocessor Hardware (3) UMA multiprocessors using multistage switching networks can be built from 2x2 switches (a) 2x2 switch (b) Message format * Multiprocessor Hardware (4) Omega Switching Network * Multiprocessor Hardware (5) NUMA Multiprocessor Characteristics Single address space visible to all CPUs Access to remote memory via commands LOAD STORE Access to remote memory slower than to local * Multiprocessor Hardware (6) (a) 256-node directory based multiprocessor (b) Fields of 32-bit memory address (c) Directory at node 36 * Multiprocessor OS Types (1) Each CPU has its own operating system Bus * Multiprocessor OS Types (2) Master-Slave multiprocessors Bus * Multiprocessor OS Types (3) Symmetric Multiprocessors SMP multiprocessor model Bus * Multiprocessor Synchronization (1) TSL instruction can fail if bus already locked * Multiprocessor Synchronization (2) Multiple locks used to avoid cache thrashing * Multiprocessor Synchronization (3) Spinning versus Switching In some cases CPU must wait waits to acquire ready list In other cases a choice exists spinning wastes CPU cycles switching uses up CPU cycles also possible to make separate decision each time locked mutex encountered * Multiprocessor Scheduling (1) Timesharing note use of single data structure for scheduling * Multiprocessor Scheduling (2) Space sharing multiple threads at same time across multiple CPUs * Multiprocessor Scheduling (3) Problem with .