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Adaptive Techniques for Dynamic Processor Optimization

In the design of an integrated circuit, the designer is faced with the challenge of having circuits and systems function over multiple operating points. From the point of view of performance, the circuit must meet its speed requirements over a range of voltages and temperatures that reflect the environment that the circuit is operating in. Also while the performance requirement must be met at a set of worst-case conditions for speed, the power requirement must be simultaneously met at another set of worstcase conditions for power | INTEGRATED CIRCUITS AND SYSTEMS Dynamic Processor Optimization Theory and Practice Springer Adaptive Techniques for Dynamic Processor Optimization Theory and Practice Series on Integrated Circuits and Systems Series Editor Anantha Chandrakasan Massachusetts Institute of Technology Cambridge Massachusetts Adaptive Techniques for Dynamic Processor Optimization Theory and Practice Alice Wang and Samuel Naffziger Eds. ISBN 978-0-387-76471-9 mm-Wave Silicon Technology 60 GHz and Beyond Ali M. Niknejad and Hossein Hashemi Eds. ISBN 978-0-387-76558-7 Ultra Wideband Circuits Transceivers and Systems Ranjit Gharpurey and Peter Kinget Eds. ISBN 978-0-387-37238-9 Creating Assertion-Based IP Harry D. Foster and Adam C. Krolnik ISbN 978-0-387-36641-8 Design for Manufacturability and Statistical Design A Constructive Approach Michael Orshansky Sani R. Nassif and Duane Boning ISBN 978-0-387-30928-6 Low Power Methodology Manual For System-on-Chip Design Michael Keating David Flynn Rob Aitken Alan Gibbons and Kaijian Shi ISBN 978-0-387-71818-7 Modern Circuit Placement Best Practices and Results Gi-Joon Nam and Jason Cong ISBN 978-0-387-36837-5 CMOS Biotechnology Hakho Lee Donhee Ham and Robert M. Westervelt ISBN 978-0-387-36836-8 SAT-Based Scalable Formal Verification Solutions Malay Ganai and Aarti Gupta ISBN 978-0-387-69166-4 2007 Ultra-Low Voltage Nano-Scale Memories Kiyoo Itoh Masashi Horiguchi and Hitoshi Tanaka IsBn 978-0-387-33398-4 2007 Routing Congestion in VLSI Circuits Estimation and Optimization Prashant Saxena Rupesh S. Shelar Sachin Sapatnekar ISBN 978-0-387-30037-5 2007 Ultra-Low Power Wireless Technologies for Sensor Networks Brian Otis and Jan Rabaey ISBN 978-0-387-30930-9 2007 Sub-Threshold Design for Ultra Low-Power Systems Alice Wang Benton H. Calhoun and Anantha Chandrakasan ISBN 978-0-387-33515-5 2006 High Performance Energy Efficient Microprocessor Design Vojin Oklibdzija and Ram Krishnamurthy Eds. IsBn 978-0-387-28594-8 2006 Continued after .