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High Level Synthesis: from Algorithm to Digital Circuit- P7

High Level Synthesis: from Algorithm to Digital Circuit- P7: This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. "High-Level Synthesis: from Algorithm to Digital Circuit" should be on each designer's and CAD developer's shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design. | 46 T. Bollaert void pixelpipe uint2 type. 7 input block type Y cr cb rgb_t rgb 64 7 input block R G B codes_t codes. output huffman codes unsigned char huffsizes 2 2 256 input huffman tables DC AC LUMA CHROMA unsigned int huffcodes 2 2 256 input huffman tables DC AC LUMA CHROMA char ycbcrOut 64 short dctOut 64 short vectorOut 64 int quantizeOut 64 uint6 last_non_zero_index uint2 ycbcrType quantizeType convert 8x8 RGB block to 8x8 YCbCr rgb2ycbcr rgb type ycbcrOut sycbcrType run 2D 8x8 DCT on the block det ycbcrOut dctOut zig-zag and quantize the results reorder_and_quantize iycbcrType detout quantizeOut last_non_zero_index squantizeType run-length and Huffman encode huffmanize ftquantizeType quantizeOut last_non_zero_index codes huffsizes huffcodes Fig. 3.12 C source code for the synthesized top level void rgb2ycbcr rgb_t rgb 64 uint2 typeln char ycbcr 64 uint2 typeOut ac_fixed 16 l true coeffs 3 3 0.299 0.587 0.114 -0.168736 -0.331264 0.5 0.5 -0.418688 -0.081312 ac_fixed 8 8 false trap uint2 k typeln normalize values by subtracting 128 and convert to YCbCr convert2ycbcr for unsigned int i 0 i 64 i trap coeffs k 0 rgb i .r coeffs k 1 rgb ij.g coeffs k 2 rgb i .b k 128 0 trap - 128 yeber i trap.to int typeOut k Fig. 3.13 C source code for the rgb2ycbcr function In the C source Fig. 3.13 the RBG input is modeled as an array of structs. The rgb_t struct contains three fields r g and b. By default Catapult assumes the R G and B components are mapped to three different interface resources. Using interface synthesis constraints it is possible to merge them all side-by-side on the same resource and map this resource to a memory. This way the color space conversion block will get all its input from a single memory with every read returning all three R G and B color components over a 3 x 8 24 bit data bus Fig. 3.14 . The function itself is pipelined with an initiation interval of 1 to create a continuously running design with a throughput of 1 memory access per cycle. By .