Đang chuẩn bị liên kết để tải về tài liệu:
ARM Architecture Reference Manual- P16

ARM Architecture Reference Manual- P16: The ARM instruction set architecture has evolved significantly since it was first developed, and will continue to be developed in the future. In order to be precise about which instructions exist in any particular ARM implementation, five major versions of the instruction set have been defined to date. | Enhanced DSP Extension Usage MCRR is used to initiate coprocessor operations that depend on values in two ARM registers. An example for a floating-point coprocessor is an instruction to transfer a double-precision floating-point number held in two ARM registers to a floating-point register. Notes Coprocessor fields Only instruction bits 31 8 are defined by the ARM architecture. The remaining fields are recommendations for compatibility with ARM Development Systems. Unimplemented coprocessor instructions Hardware coprocessor support is optional regardless of the architecture version. An implementation may choose to implement a subset of the coprocessor instructions or no coprocessor instructions at all. Any coprocessor instructions that are not implemented instead cause an undefined instruction trap. Order of transfers If a coprocessor uses these instructions it will define how each of the values of Rd and Rn is used. There is no architectural requirement for the two register transfers to occur in any particular time order. It is IMPLEMENTATION DEFINED whether Rd is transferred before Rn after Rn or at the same time as Rn. ARM DDI 0100E Copyright 1996-2000 ARM Limited. All rights reserved. A10-11 Enhanced DSP Extension 10.6.3 MRRC 31 28 27 26 25 24 23 22 21 20 19 16 15 12 11 87 43 0 cond 1 1 0 0 0 1 0 1 Rn Rd cp_num opcode CRm The MRRC instruction causes the coprocessor whose number is cp_num to transfer values to two ARM registers Rd and Rn . If no coprocessors indicate that they can execute the instruction an undefined instruction exception is generated. Syntax MRRC cond coproc opcode Rd Rn CRm where cond Is the condition under which the instruction is executed. The conditions are defined in The condition field on page A3-5. If cond is omitted the AL always condition is used. coproc Specifies the name of the coprocessor and causes the corresponding coprocessor number to be placed in the cp_num field of the instruction. The standard generic coprocessor names are p0